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X28C256DMB-25资料 | |
X28C256DMB-25 PDF Download |
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File Size : 116 KB
Manufacturer:XICOR Description: TypeDescription P3.3 volt input supply voltage. P5.0 volt reference for 5.0 volt signaling environments and 3.3 volt reference for 3.3 volt signaling environments. PGround Pin I/OThe PCI address and data lines are multiplexed on the same PCI pins. During the first clock cycle of a transaction, the 32 bits contain an address and during subsequent clock cycles, they contain data. Both read and write bursts are supported in master operation only. Big or Little Indian byte ordering can be used. OAddress line bit 0 also carries in two consecutive address cycles (bits 16 and 17) in a 256KB configuration. Bit 1 also latches the boot ROM address and control lines via two external latches. I/OIn the first of two consecutive address cycles, these multiplexed lines contain the boot ROM address bits [7:2], oe_n, and we_n. The second cycle contains boot ROM address bits [15:8]. Bits 7 through 0 contain data during the data cycle. These lines are used to carry data to and from the external register. |
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1PCS | 100PCS | 1K | 10K | ||
价 格 | |||||
型 号:X28C256DMB-25 厂 家:XICOR 封 装:DIP 批 号:0023+ 数 量:688 说 明:自家库存-房间现货 |
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运 费:20 所在地:深圳市 新旧程度: |
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