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| EP910DM资料 | |
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EP910DM PDF Download |
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File Size : 116 KB
Manufacturer:ALTERA Description:Each work position in the register is clocked by a control flip- flop, which stores a marker bit. A 1 signifies that the posi- tions data is filled and a 0 denotes a vacancy in that posi- tion. The control flip-flop detects the state of the preceding flip-flop and communicates its own status to the succeeding flip-flop. When a control flip-flop is in the 0 state and sees a 1 in the preceeding flip-flop, it generates a clock pulse that transfers data from the preceding four data latches into its own four data latches and resets the preceding flip-flop to 0. The first and last control flip-flops have buffered outputs. Since all empty locations bubble automatically to the input end, and all valid data ripple through to the output end, the status of the first control flip-flop (DATA-IN READY) indicates if the FIFO is full, and the status of the last flip-flop (DATA- OUT READY) indicates if the FIFO contains data. As the earliest data are removed from the bottom of the data stack (the output end), all data entered later will automatically propagate (ripple) toward the output. |
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| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：EP910DM 厂 家：ALTERA 封 装：JLCC 批 号：05+/06+ 数 量：200 说 明：自家库存-房间现货 |
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运 费：20 所在地：深圳市 新旧程度： |
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| 联系人：苏先生 |
| 电 话：0755-23816225,23816266 |
| 手 机：13823680775, |
| QQ：2850360178,2850360173,861681926 |
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| 传 真：0755-33062278 |
| EMail：szgy_dz@yahoo.cn |
| 公司地址： 深圳市福田区振华路赛格电子市场高科德交易中心2楼22951室 |
| 购买价值5000元以上，我们可以承担运费。多谢各路朋友支持！ |
